diff options
| -rw-r--r-- | model.cpp | 1 | ||||
| -rw-r--r-- | pipeline.cpp | 5 | ||||
| -rw-r--r-- | video.cpp | 12 | ||||
| -rw-r--r-- | video.hpp | 10 | 
4 files changed, 25 insertions, 3 deletions
| @@ -209,6 +209,7 @@ void Model::render(  			pb.depth(true, true, Depth_Mode::less);  		else  			pb.depth(true, false, Depth_Mode::equal); +		pb.cull(Cull_Mode::back);  		pb.shader(mesh.shader);  		pb.cbuffer(  			mesh.mvp_binding, diff --git a/pipeline.cpp b/pipeline.cpp index cb052b8..2dc8ce9 100644 --- a/pipeline.cpp +++ b/pipeline.cpp @@ -180,6 +180,10 @@ void Pipeline_Builder::blend(  	);  } +void Pipeline_Builder::cull(Cull_Mode mode) { +	pip->cull_mode = mode; +} +  void Pipeline_Builder::blend(  	Blend_Mode mode_col,  	Blend_Factor src_col, @@ -265,6 +269,7 @@ Pipeline& Pipeline_Builder::build() {  	h(pip->pipeline_hash, pip->blend_dst);  	h(pip->pipeline_hash, pip->blend_src_alpha);  	h(pip->pipeline_hash, pip->blend_dst_alpha); +	h(pip->pipeline_hash, pip->cull_mode);  	{  		int i, e = pip->descriptor_count;  		pip->descriptor_resource_hash = fnv1a64(0, 0); @@ -250,6 +250,15 @@ struct Vram_Allocator {  	void free(Allocation& alloc);  }; +static VkCullModeFlags get_vk_cull_mode(Cull_Mode mode) { +	switch (mode) { +		case Cull_Mode::none:  return VK_CULL_MODE_NONE; +		case Cull_Mode::back:  return VK_CULL_MODE_BACK_BIT; +		case Cull_Mode::front: return VK_CULL_MODE_FRONT_BIT; +	} +	assert(0); +	return VK_CULL_MODE_NONE; +}  static VkFormat get_vk_format(Texture_Format fmt) {  	switch (fmt) { @@ -2631,14 +2640,13 @@ void Pipeline_Vk::init_rasterisation(  			sizeof ri  		);  	(void)dev; -	(void)desc;  	zero(&ri, sizeof ri);  	ri.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO;  	ri.depthClampEnable = VK_FALSE;  	ri.rasterizerDiscardEnable = VK_FALSE;  	ri.polygonMode = VK_POLYGON_MODE_FILL;  	ri.lineWidth = 1.0f; -	ri.cullMode = VK_CULL_MODE_NONE; +	ri.cullMode = get_vk_cull_mode(desc.cull_mode);  	ri.frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE;  	ri.depthBiasEnable = VK_FALSE;  	info.pRasterizationState = &ri; @@ -104,6 +104,11 @@ enum class Blend_Mode {  	max  }; +enum class Cull_Mode { +	none, +	back, +	front +};  struct Pipeline {  	uint64_t pipeline_hash; @@ -117,6 +122,7 @@ struct Pipeline {  	Blend_Mode blend_mode;  	Blend_Factor blend_src_alpha, blend_dst_alpha;  	Blend_Mode blend_mode_alpha; +	Cull_Mode cull_mode;  	Vertex_Format_Id vertex_format;  	Shader_Id shader;  	Descriptor descriptors[pipeline_max_descriptors]; @@ -143,7 +149,8 @@ struct Pipeline {  			blend_src_alpha == other.blend_src_alpha &&  			blend_dst_alpha == other.blend_dst_alpha &&  			blend_mode == other.blend_mode && -			blend_mode_alpha == other.blend_mode_alpha; +			blend_mode_alpha == other.blend_mode_alpha && +			cull_mode == other.cull_mode;  	}  	bool desc_layout_eq(const Pipeline& other) const { @@ -300,6 +307,7 @@ struct Pipeline_Builder {  		Blend_Factor src_alpha,  		Blend_Factor dst_alpha  	); +	void cull(Cull_Mode mode);  	void shader(Shader_Id s);  	void vertex_format(Vertex_Format_Id vf);  	void texture(int binding, Texture_Id t, Sampler_Id s); |